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Results 1 to 25 of 1094

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Position Modulation Code for Rewriting Write-Once MemoriesYUNNAN WU; JIANG, Anxiao.IEEE transactions on information theory. 2011, Vol 57, Num 6, pp 3692-3697, issn 0018-9448, 6 p.Article

Some Codes Correcting Unbalanced Errors of Limited Magnitude for Flash MemoriesYARI, Somaye; KLØVE, Torleiv; BOSE, Bella et al.IEEE transactions on information theory. 2013, Vol 59, Num 11, pp 7278-7287, issn 0018-9448, 10 p.Conference Paper

Using Short Synchronous WOM Codes to Make WOM Codes DecodableBITOUZE, Nicolas; I AMAT, Alexandre Graell; ROSNES, Eirik et al.IEEE transactions on communications. 2014, Vol 62, Num 7, pp 2156-2169, issn 0090-6778, 14 p.Article

Flash memory technologyCAMPARDO, Giovanni; MICHELONI, Rino.Proceedings of the IEEE. 2003, Vol 91, Num 4, issn 0018-9219, 154 p.Serial Issue

Magnetoelectric Charge Trap MemoryBAUER, Uwe; PRZYBYLSKI, Marek; KIRSCHNER, Jürgen et al.Nano letters (Print). 2012, Vol 12, Num 3, pp 1437-1442, issn 1530-6984, 6 p.Article

Improved flash memory grows in popularityLAWTON, George.Computer (Long Beach, CA). 2006, Vol 39, Num 1, pp 16-18, issn 0018-9162, 3 p.Article

Rewriting Codes for Flash MemoriesYAAKOBI, Eitan; MAHDAVIFAR, Hessam; SIEGEL, Paul H et al.IEEE transactions on information theory. 2014, Vol 60, Num 2, pp 964-975, issn 0018-9448, 12 p.Article

Capacity-Achieving Multiwrite WOM CodesSHPILKA, Amir.IEEE transactions on information theory. 2014, Vol 60, Num 3, pp 1481-1487, issn 0018-9448, 7 p.Article

Flash Storage MemoryLEVENTHAL, Adam.Communications of the ACM. 2008, Vol 51, Num 7, pp 47-51, issn 0001-0782, 5 p.Article

Novel program versus disturb window characterization for split-gate flash cellSUNG, Hung-Cheng; LEI, Tan Fu; HSU, Te-Hsun et al.IEEE electron device letters. 2005, Vol 26, Num 3, pp 194-196, issn 0741-3106, 3 p.Article

Using an ammonia treatment to improve the floating-gate spacing in split-gate flash memoryCHU, Wen-Ting; LIN, Hao-Hsiung; TU, Yeur-Luen et al.IEEE electron device letters. 2004, Vol 25, Num 9, pp 616-618, issn 0741-3106, 3 p.Article

Graded Bit-Error-Correcting Codes With Applications to Flash MemoryGABRYS, Ryan; YAAKOBI, Eitan; DOLECEK, Lara et al.IEEE transactions on information theory. 2013, Vol 59, Num 4, pp 2315-2327, issn 0018-9448, 13 p.Article

RNFTL: A Reuse-Aware NAND Flash Translation Layer for Flash MemoryYI WANG; DUO LIU; MENG WANG et al.ACM SIGPLAN notices. 2010, Vol 45, Num 4, pp 163-172, issn 1523-2867, 10 p.Conference Paper

An investigation of erase-mode dependent hole trapping in flash EEPROM memory cellHADDAD, S; CHI CHANG; WANG, A et al.IEEE electron device letters. 1990, Vol 11, Num 11, pp 514-516, issn 0741-3106, 3 p.Article

Test and repair of embedded flash memoriesDAGA, Jean Michel.Proceedings - International Test Conference. 2002, issn 1089-3539, isbn 0-7803-7542-4, p. 1219Conference Paper

The Five-Minute Rule 20 Years Later (and How Flash Memory Changes the Rules)GRAEFE, Goetz.Communications of the ACM. 2009, Vol 52, Num 7, pp 48-59, issn 0001-0782, 12 p.Article

l'avènement des mémoires flash = The advent of the flash memoriesMARTIN, Gabriel.Recherche (Paris, 1970). 2004, Num 375, pp 84-85, issn 0029-5671, 2 p.Article

Test and repair of non-volatile commodity and embedded memories (NAND flash memory )SHIROTA, Riichiro.Proceedings - International Test Conference. 2002, issn 1089-3539, isbn 0-7803-7542-4, p. 1221Conference Paper

A 146-mm2 8-Gb multi-level NAND flash memory with 70-nm CMOS technologyHARA, Takahiko; FUKUDA, Koichi; TAKEUCHI, Yoshiaki et al.IEEE journal of solid-state circuits. 2006, Vol 41, Num 1, pp 161-169, issn 0018-9200, 9 p.Conference Paper

A 130-nm 0.9-V 66-MHz 8-Mb (256K × 32) local SONOS embedded flash EEPROMSEO, Myoung-Kyu; SIM, Soung-Hoon; OH, Myoung-Hee et al.IEEE journal of solid-state circuits. 2005, Vol 40, Num 4, pp 877-883, issn 0018-9200, 7 p.Conference Paper

A 70 nm 16 Gb 16-Level-Cell NAND flash MemorySHIBATA, Noboru; MAEJIMA, Hiroshi; KANEBAKO, Kazunori et al.IEEE journal of solid-state circuits. 2008, Vol 43, Num 4, pp 929-937, issn 0018-9200, 9 p.Conference Paper

Characteristics of gate-all-around polycrystalline silicon channel SONOS flash memoryJOO YUN SEO; LEE, Sang-Ho; SE HWAN PARK et al.International journal of nanotechnology. 2014, Vol 11, Num 1-4, pp 116-125, issn 1475-7435, 10 p.Conference Paper

A Case for Redundant Arrays of Hybrid Disks (RAHD)WANG, Frank; NA HELIAN; SINING WU et al.IEEE transactions on magnetics. 2008, Vol 44, Num 11, pp 3738-3741, issn 0018-9464, 4 p., 2Conference Paper

Investigation of the soft-write mechanism in source-side injection flash EEPROM devicesVAN HOUDT, J. F; WELLEKENS, D; GROESENEKEN, G et al.IEEE electron device letters. 1995, Vol 16, Num 5, pp 181-183, issn 0741-3106Article

What the Future Holds for Solid-State MemorySTRAUSS, Karin; BURGER, Doug.Computer (Long Beach, CA). 2014, Vol 47, Num 1, pp 24-31, issn 0018-9162, 8 p.Article

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